JPH0428174B2 - - Google Patents

Info

Publication number
JPH0428174B2
JPH0428174B2 JP61090357A JP9035786A JPH0428174B2 JP H0428174 B2 JPH0428174 B2 JP H0428174B2 JP 61090357 A JP61090357 A JP 61090357A JP 9035786 A JP9035786 A JP 9035786A JP H0428174 B2 JPH0428174 B2 JP H0428174B2
Authority
JP
Japan
Prior art keywords
signal
pulse
circuit
clock signal
high level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61090357A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62253212A (ja
Inventor
Nakatoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61090357A priority Critical patent/JPS62253212A/ja
Priority to EP87303274A priority patent/EP0243075B1/en
Priority to DE8787303274T priority patent/DE3773980D1/de
Priority to US07/039,225 priority patent/US4777448A/en
Priority to KR1019870003721A priority patent/KR900004192B1/ko
Publication of JPS62253212A publication Critical patent/JPS62253212A/ja
Publication of JPH0428174B2 publication Critical patent/JPH0428174B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K6/00Manipulating pulses having a finite slope and not covered by one of the other main groups of this subclass
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP61090357A 1986-04-18 1986-04-18 周波数逓倍回路 Granted JPS62253212A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP61090357A JPS62253212A (ja) 1986-04-18 1986-04-18 周波数逓倍回路
EP87303274A EP0243075B1 (en) 1986-04-18 1987-04-14 Frequency multiplying circuit
DE8787303274T DE3773980D1 (de) 1986-04-18 1987-04-14 Schaltungsanordnung zur frequenzvervielfachung.
US07/039,225 US4777448A (en) 1986-04-18 1987-04-17 Frequency multiplying circuit
KR1019870003721A KR900004192B1 (ko) 1986-04-18 1987-04-18 주파수 체배회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61090357A JPS62253212A (ja) 1986-04-18 1986-04-18 周波数逓倍回路

Publications (2)

Publication Number Publication Date
JPS62253212A JPS62253212A (ja) 1987-11-05
JPH0428174B2 true JPH0428174B2 (en]) 1992-05-13

Family

ID=13996280

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61090357A Granted JPS62253212A (ja) 1986-04-18 1986-04-18 周波数逓倍回路

Country Status (5)

Country Link
US (1) US4777448A (en])
EP (1) EP0243075B1 (en])
JP (1) JPS62253212A (en])
KR (1) KR900004192B1 (en])
DE (1) DE3773980D1 (en])

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4873704A (en) * 1988-05-09 1989-10-10 Cpt Corporation Method and apparatus for effectively doubling the operational speed of selected digital circuits
KR920002491B1 (ko) * 1988-07-25 1992-03-26 주식회사 금성사 캡스턴 재생속도모우드의 자동판독장치
US5107264A (en) * 1990-09-26 1992-04-21 International Business Machines Corporation Digital frequency multiplication and data serialization circuits
JP2861465B2 (ja) * 1991-05-16 1999-02-24 日本電気株式会社 周波数逓倍回路
US5721501A (en) * 1995-07-26 1998-02-24 Kabushiki Kaisha Toshiba Frequency multiplier and semiconductor integrated circuit employing the same
US5930275A (en) * 1996-06-06 1999-07-27 Tandem Computers Incorporated Clock error detection circuit
JP3110377B2 (ja) * 1998-04-28 2000-11-20 日本電気アイシーマイコンシステム株式会社 逓倍回路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3555434A (en) * 1968-06-03 1971-01-12 Atomic Energy Commission System for the suppression of transient noise pulses
US3893042A (en) * 1973-12-12 1975-07-01 Us Navy Lock indicator for phase-locked loops
US4004234A (en) * 1975-06-23 1977-01-18 Owens-Illinois, Inc. Article presence sensor
US3980960A (en) * 1975-10-09 1976-09-14 Computer Identics Corporation Signal width and width ratio determining apparatus
US4344039A (en) * 1979-03-13 1982-08-10 Sanyo Electric Co., Ltd. Demodulating circuit for self-clocking-information
US4344038A (en) * 1980-05-27 1982-08-10 The Magnavox Company Low frequency tone detector
US4360782A (en) * 1980-09-26 1982-11-23 Honeywell Information Systems Inc. Maximum frequency detector
US4611335A (en) * 1981-09-30 1986-09-09 Hitachi, Ltd. Digital data synchronizing circuit

Also Published As

Publication number Publication date
KR870010692A (ko) 1987-11-30
EP0243075A3 (en) 1988-12-14
EP0243075B1 (en) 1991-10-23
EP0243075A2 (en) 1987-10-28
US4777448A (en) 1988-10-11
DE3773980D1 (de) 1991-11-28
KR900004192B1 (ko) 1990-06-18
JPS62253212A (ja) 1987-11-05

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees